/****************************************************************************
*
* Copyright (c) 2023  C*Core -   All Rights Reserved
*
* THIS SOFTWARE IS DISTRIBUTED "AS IS, " AND ALL WARRANTIES ARE DISCLAIMED,
* INCLUDING MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*
* PROJECT     : CCFC2011BC
* DESCRIPTION : CCFC2011BC MCU configuration code.
* HISTORY     : 2022
* @file     Mcu_Config.c
* @version  1.1
* @date     2023 - 02 - 20
* @brief    Initial version.
*
*****************************************************************************/
#include "Mcu_Config.h"
#include "Mcu_lld.h"
#include "demo.h"
#include "lldconf.h"

/**
* @brief   Clock output(PA[0]) switch.
* @param   STD_ON, STD_OFF
*/
#define CLKOUT_SWITCH       (STD_ON)

/**
* @brief    MCU mode driver configuration (pre - compiled).
*/
static Mcu_ModeConfig_t Mcu_ModeConfig_PC =
{
    (ME_ME_RESET
    |ME_ME_SAFE
    |ME_ME_DRUN
    |ME_ME_RUN0
    |ME_ME_STOP
    |ME_ME_STANDBY
   ),  /* Mcu_ModeEnable_Cfg      */

    (ME_IM_NULL
   ),  /* InterruptMask_Cfg       */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_NORMAL
    |MC_DFLS_NORMAL
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* TEST_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_ON
    |MC_FMPLL_OFF
    |MC_CFLS_NORMAL
    |MC_DFLS_NORMAL
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* DRUN_Mode_Cfg           */

    (MCU_SYSCLK_PLL
    |MC_FIRC_ON
    |MC_FXOSC_ON
    |MC_FMPLL_ON
    |MC_CFLS_NORMAL
    |MC_DFLS_NORMAL
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* RUN0_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_NORMAL
    |MC_DFLS_NORMAL
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* RUN1_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_NORMAL
    |MC_DFLS_NORMAL
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* RUN2_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_NORMAL
    |MC_DFLS_NORMAL
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* RUN3_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_LOWPOWER
    |MC_DFLS_LOWPOWER
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* HALT_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_POWERDOWN
    |MC_DFLS_POWERDOWN
    |MC_MVR_ON
    |MC_PDO_OFF
   ),  /* STOP_Mode_Cfg           */

    (MCU_SYSCLK_FIRC
    |MC_FIRC_ON
    |MC_FXOSC_OFF
    |MC_FMPLL_OFF
    |MC_CFLS_POWERDOWN
    |MC_DFLS_POWERDOWN
    |MC_MVR_OFF
    |MC_PDO_OFF
   ),  /* STANDBY_Mode_Cfg        */

    (RUN_PC_TEST
    |RUN_PC_SAFE
    |RUN_PC_DRUN
    |RUN_PC_RUN0
    |RUN_PC_RUN1
    |RUN_PC_RUN2
    |RUN_PC_RUN3
   ),  /* RUN_PeriphCfg0_Cfg      */

    (RUN_PC_TEST
    |RUN_PC_SAFE
    |RUN_PC_DRUN
    |RUN_PC_RUN0
    |RUN_PC_RUN1
    |RUN_PC_RUN2
    |RUN_PC_RUN3
   ),  /* RUN_PeriphCfg1_Cfg      */

    (RUN_PC_NULL
   ),  /* RUN_PeriphCfg2_Cfg      */

    (RUN_PC_NULL
   ),  /* RUN_PeriphCfg3_Cfg      */

    (RUN_PC_NULL
   ),  /* RUN_PeriphCfg4_Cfg      */

    (RUN_PC_NULL
   ),  /* RUN_PeriphCfg5_Cfg      */

    (RUN_PC_NULL
   ),  /* RUN_PeriphCfg6_Cfg      */

    (RUN_PC_NULL
   ),  /* RUN_PeriphCfg7_Cfg      */

    (LP_PC_HALT
    |LP_PC_STOP
    |LP_PC_STANDBY
   ),  /* LowPower_PeriphCfg0_Cfg */

    (LP_PC_HALT
	|LP_PC_STOP
	|LP_PC_STANDBY
   ),  /* LowPower_PeriphCfg1_Cfg */ 

    (LP_PC_NULL
   ),  /* LowPower_PeriphCfg2_Cfg */

    (LP_PC_NULL
   ),  /* LowPower_PeriphCfg3_Cfg */

    (LP_PC_NULL
   ),  /* LowPower_PeriphCfg4_Cfg */

    (LP_PC_NULL
   ),  /* LowPower_PeriphCfg5_Cfg */

    (LP_PC_NULL
   ),  /* LowPower_PeriphCfg6_Cfg */

    (LP_PC_NULL
   ),  /* LowPower_PeriphCfg7_Cfg */
};

/**
* @brief    MCU clock driver configuration (pre - compiled).
*/
static Mcu_ClockConfig_t Mcu_ClkConfig_PC =
{
    (ME_MODE_RUN0
   ),  /** TargetMode_Cfg    **/

    (OSC_CTL_DEFAULT
   ),  /** FXOSC_Cfg         **/

    (OSC_CTL_DEFAULT
   ),  /** SXOSC_Cfg         **/

    (FIRC_CTL_DEFAULT
   ),  /** FIRC_Cfg          **/

    (SIRC_CTL_DEFAULT
   ),  /** SIRC_Cfg          **/

    (PLL_NORMAL_MODE
   ),  /** PLLFuncMode_Cfg   **/

    (PLL_64M
   ),  /** PLLClkVal_Cfg     **/

    ((0UL & FMPLL_INC_STEP_MASK)
    |(FM_EN)
    |(0UL & FMPLL_MOD_PERIOD_MASK)
    |(FM_CENTER_SPRD)
    |(FM_STROBE_USE)
   ),  /** FMPLL_Cfg         **/

    (SYSCLK_DIV_1
   ),  /** PeriphDiv0_Cfg    **/
    (SYSCLK_DIV_1
   ),  /** PeriphDiv1_Cfg    **/
    (SYSCLK_DIV_1
   ),  /** PeriphDiv2_Cfg    **/

    (CMU_CLK_MONITOR_DIS
    |CMU_RCDIV_8
    |CMU_CKSEL1_FIRC
   ),  /** CMU_Cfg           **/

    ((uint32_t)0UL
   ),  /** CMU_CLKSEL**/
    ((uint32_t)0UL
   ),  /** CMU_RCDIV   **/

    (
#if (CLKOUT_SWITCH == STD_ON)
    (CLKOUT_EN)
#else
    (CLKOUT_DIS)
#endif
    |CLKOUT_DIV_8
    |CLKOUT_SC_SYSCLK
   ),  /** ClkOut_Config     **/
};

/**
* @brief    MCU driver configuration (pre - compiled).
*/
Mcu_Config_t McuConfig_PC =
{
    &Mcu_ModeConfig_PC,
    &Mcu_ClkConfig_PC,
};
